Low voltage differential signaling (LVDS) is used for communicating data using a very low power differential signal. This differential signal is either used to communicate data using two PCB traces or a balanced cable. A voltage difference is typically under 400 mV for the voltage swing.
Currently, many solutions exist for exchanging digital data on a PCB, however limited solutions exist in exchanging data between devices connected using a cable. Moving this digital data across the cable requires an extremely high-performance solution that consumes minimal power, is relatively immune to noise, inexpensive, and generates little noise. LVDS is advantageous because digital data is transmitted differentially, using two wires with opposite current or voltage swings instead of a single wire. Thus, if common-mode noise couples into the two wires, it is rejected by a receiver circuit since the noise appears on both lines equally and the receiver circuit receives a difference between the two signals. Furthermore, differential signals tend to radiate less noise than single ended signals due to the canceling of magnetic fields.
A typical LVDS differential output signal is specified to be 400 mv (max) into a 100 Ohms load with a common mode voltage (CMV) of 1.2V. Each of the output ports of a LVDS transmitter is terminated to both power and ground rails with a nominal impedance of 50 Ohms. Conventional and somehow advanced techniques that are used in producing of a LVDS compliant driver use differential current mode logic (CML) or a variant on a differential CMOS push/pull driver circuit. In order to achieve a 1.2V CML, the conventional techniques require the use of a high supply voltage. Current submicron integration technology supports voltages that are nominally 3.3V.
Additionally, impedance matching to the power and ground rails is necessary. However, in order to generate the required internal 50 Ohms termination to power and ground, an additional internal current is utilized to produce the required impedance match. This current can range from 3 to 4 times the external load current. For simplicity, for a load of 100 Ohms and 400 mv differential swing, the load current is then 4 mA, which means the wasted internal current is 12-16 mA. This translates into an internal power consumption of P=V*I, where the I=12-16 ma and V=*3.3 v, which leads to wasted power of approximately 39.6 mW to 52.8 mW.
A need therefore exists to provide a LDVS circuit that does not rely on an additional internal current to produce the impedance match between power and ground rails. Alternatively, it would also be advantageous to reduce the power consumption relating to producing the impedance match between power and ground rails. It is therefore an object of the invention to provide a LVDS circuit that provides low power consumption with built in impedance termination to supply and ground.